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| author | nyamatongwe <unknown> | 2004-10-16 00:41:26 +0000 |
|---|---|---|
| committer | nyamatongwe <unknown> | 2004-10-16 00:41:26 +0000 |
| commit | a4fb9018cac19262d90f9aaa42c9d3bfb7da4469 (patch) | |
| tree | 0d30998285acc659b38df99f83136ee312f05ec3 /gtk/scintilla.mak | |
| parent | a627bdc687fbf7693358f115a6e77bffe3948549 (diff) | |
| download | scintilla-mirror-a4fb9018cac19262d90f9aaa42c9d3bfb7da4469.tar.gz | |
VHDL lexer contributed by Phil Reid.
Diffstat (limited to 'gtk/scintilla.mak')
| -rw-r--r-- | gtk/scintilla.mak | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/gtk/scintilla.mak b/gtk/scintilla.mak index b11351e69..a1a536827 100644 --- a/gtk/scintilla.mak +++ b/gtk/scintilla.mak @@ -184,6 +184,7 @@ LEXOBJS=\ $(DIR_O)\LexTeX.obj \ $(DIR_O)\LexVB.obj \ $(DIR_O)\LexVerilog.obj \ + $(DIR_O)\LexVHDL.obj \ $(DIR_O)\LexYAML.obj \ #--Autogenerated -- end of automatically generated section @@ -391,6 +392,8 @@ $(DIR_O)\LexVB.obj: ..\src\LexVB.cxx $(LEX_HEADERS) $(DIR_O)\LexVerilog.obj: ..\src\LexVerilog.cxx $(LEX_HEADERS) +$(DIR_O)\LexVHDL.obj: ..\src\LexVHDL.cxx $(LEX_HEADERS) + $(DIR_O)\LexYAML.obj: ..\src\LexYAML.cxx $(LEX_HEADERS) |