From 4fdda6b8a63dc6ddd1f4ad5e417760a0ffcac539 Mon Sep 17 00:00:00 2001 From: Neil Date: Wed, 20 Aug 2014 16:03:07 +1000 Subject: Bug [#1527]. Support block comments in VHDL. From danselmi. --- include/SciLexer.h | 1 + include/Scintilla.iface | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/SciLexer.h b/include/SciLexer.h index b45ed9474..11eaf7b5e 100644 --- a/include/SciLexer.h +++ b/include/SciLexer.h @@ -1004,6 +1004,7 @@ #define SCE_VHDL_STDPACKAGE 12 #define SCE_VHDL_STDTYPE 13 #define SCE_VHDL_USERWORD 14 +#define SCE_VHDL_BLOCK_COMMENT 15 #define SCE_CAML_DEFAULT 0 #define SCE_CAML_IDENTIFIER 1 #define SCE_CAML_TAGNAME 2 diff --git a/include/Scintilla.iface b/include/Scintilla.iface index ec047f2d4..e6fbd02f8 100644 --- a/include/Scintilla.iface +++ b/include/Scintilla.iface @@ -3703,6 +3703,7 @@ val SCE_VHDL_STDFUNCTION=11 val SCE_VHDL_STDPACKAGE=12 val SCE_VHDL_STDTYPE=13 val SCE_VHDL_USERWORD=14 +val SCE_VHDL_BLOCK_COMMENT=15 # Lexical states for SCLEX_CAML lex Caml=SCLEX_CAML SCE_CAML_ val SCE_CAML_DEFAULT=0 -- cgit v1.2.3