From 7d9b0152df196bc1104db68d1819a217184b77a5 Mon Sep 17 00:00:00 2001 From: Markus Heidelberg Date: Tue, 30 Dec 2014 23:15:47 +1100 Subject: Add new lexer for Intel HEX file format --- include/Scintilla.iface | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/Scintilla.iface b/include/Scintilla.iface index dcf170fcb..e35b16f16 100644 --- a/include/Scintilla.iface +++ b/include/Scintilla.iface @@ -2720,6 +2720,7 @@ val SCLEX_DMIS=114 val SCLEX_REGISTRY=115 val SCLEX_BIBTEX=116 val SCLEX_SREC=117 +val SCLEX_IHEX=118 # When a lexer specifies its language as SCLEX_AUTOMATIC it receives a # value assigned in sequence from SCLEX_AUTOMATIC+1. @@ -4560,11 +4561,15 @@ val SCE_HEX_DATAADDRESS=6 val SCE_HEX_RECCOUNT=7 val SCE_HEX_STARTADDRESS=8 val SCE_HEX_ADDRESSFIELD_UNKNOWN=9 +val SCE_HEX_EXTENDEDADDRESS=10 val SCE_HEX_DATA_ODD=11 val SCE_HEX_DATA_EVEN=12 val SCE_HEX_DATA_UNKNOWN=13 +val SCE_HEX_DATA_EMPTY=14 val SCE_HEX_CHECKSUM=15 val SCE_HEX_CHECKSUM_WRONG=16 +# Lexical state for SCLEX_IHEX (shared with Srec) +lex IHex=SCLEX_IHEX SCE_HEX_ # Events -- cgit v1.2.3