diff options
| -rw-r--r-- | doc/ScintillaHistory.html | 3 | ||||
| -rw-r--r-- | lexers/LexVerilog.cxx | 4 |
2 files changed, 6 insertions, 1 deletions
diff --git a/doc/ScintillaHistory.html b/doc/ScintillaHistory.html index ae9a7db2c..569fa2106 100644 --- a/doc/ScintillaHistory.html +++ b/doc/ScintillaHistory.html @@ -498,6 +498,9 @@ <a href="http://sourceforge.net/p/scintilla/bugs/1711/">Bug #1711</a>. </li> <li> + Verilog folder folds interface definitions. + </li> + <li> Fix link error on Windows when SCI_NAMESPACE used. </li> <ul> diff --git a/lexers/LexVerilog.cxx b/lexers/LexVerilog.cxx index f0995be24..82b75844f 100644 --- a/lexers/LexVerilog.cxx +++ b/lexers/LexVerilog.cxx @@ -928,9 +928,10 @@ void SCI_METHOD LexerVerilog::Fold(unsigned int startPos, int length, int initSt if (styler.Match(j, "case") || styler.Match(j, "casex") || styler.Match(j, "casez") || + styler.Match(j, "covergroup") || styler.Match(j, "function") || styler.Match(j, "generate") || - styler.Match(j, "covergroup") || + styler.Match(j, "interface") || styler.Match(j, "package") || styler.Match(j, "primitive") || styler.Match(j, "program") || @@ -962,6 +963,7 @@ void SCI_METHOD LexerVerilog::Fold(unsigned int startPos, int length, int initSt styler.Match(j, "endfunction") || styler.Match(j, "endgenerate") || styler.Match(j, "endgroup") || + styler.Match(j, "endinterface") || styler.Match(j, "endpackage") || styler.Match(j, "endprimitive") || styler.Match(j, "endprogram") || |