Support from Avi Yegudin for Verilog.

1 files changed, 15 insertions, 0 deletions

diff --git a/include/SciLexer.h b/include/SciLexer.h
index 1960cead4..a93397adc 100644
--- a/include/SciLexer.h
+++ b/include/SciLexer.h
@@ -70,6 +70,7 @@
 #define SCLEX_ERLANG 53
 #define SCLEX_OCTAVE 54
 #define SCLEX_MSSQL 55
+#define SCLEX_VERILOG 56
 #define SCLEX_AUTOMATIC 1000
 #define SCE_P_DEFAULT 0
 #define SCE_P_COMMENTLINE 1
@@ -650,6 +651,20 @@
 #define SCE_MSSQL_SYSTABLE 11
 #define SCE_MSSQL_GLOBAL_VARIABLE 12
 #define SCE_MSSQL_FUNCTION 13
+#define SCE_V_DEFAULT 0
+#define SCE_V_COMMENT 1
+#define SCE_V_COMMENTLINE 2
+#define SCE_V_COMMENTLINEBANG 3
+#define SCE_V_NUMBER 4
+#define SCE_V_WORD 5
+#define SCE_V_STRING 6
+#define SCE_V_WORD2 7
+#define SCE_V_WORD3 8
+#define SCE_V_PREPROCESSOR 9
+#define SCE_V_OPERATOR 10
+#define SCE_V_IDENTIFIER 11
+#define SCE_V_STRINGEOL 12
+#define SCE_V_USER 19
 //--Autogenerated -- end of section automatically generated from Scintilla.iface
 
 #endif