diff options
| author | nyamatongwe <devnull@localhost> | 2012-05-10 09:33:22 +1000 |
|---|---|---|
| committer | nyamatongwe <devnull@localhost> | 2012-05-10 09:33:22 +1000 |
| commit | 0f22348c0b50640f024bd252dce1af78ade35544 (patch) | |
| tree | 67ca27b786aba55d3e75af35b7abdb7818bda243 /win32 | |
| parent | 19c3dba060cc164e3848d8634675a7be00149353 (diff) | |
| download | scintilla-mirror-0f22348c0b50640f024bd252dce1af78ade35544.tar.gz | |
Lexer added for Visual Prolog. Feature #3523018.
From Thomas Linder Puls.
Diffstat (limited to 'win32')
| -rw-r--r-- | win32/scintilla.mak | 3 | ||||
| -rw-r--r-- | win32/scintilla_vc6.mak | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/win32/scintilla.mak b/win32/scintilla.mak index 79f4dff32..b4ca7204a 100644 --- a/win32/scintilla.mak +++ b/win32/scintilla.mak @@ -167,6 +167,7 @@ LEXOBJS=\ $(DIR_O)\LexVB.obj \ $(DIR_O)\LexVerilog.obj \ $(DIR_O)\LexVHDL.obj \ + $(DIR_O)\LexVisualProlog.obj \ $(DIR_O)\LexYAML.obj \ #--Autogenerated -- end of automatically generated section @@ -454,6 +455,8 @@ $(DIR_O)\LexVerilog.obj: ..\lexers\LexVerilog.cxx $(LEX_HEADERS) $(DIR_O)\LexVHDL.obj: ..\lexers\LexVHDL.cxx $(LEX_HEADERS) +$(DIR_O)\LexVisualProlog.obj: ..\lexers\LexVisualProlog.cxx $(LEX_HEADERS) + $(DIR_O)\LexYAML.obj: ..\lexers\LexYAML.cxx $(LEX_HEADERS) diff --git a/win32/scintilla_vc6.mak b/win32/scintilla_vc6.mak index df1c13aff..2f900ab01 100644 --- a/win32/scintilla_vc6.mak +++ b/win32/scintilla_vc6.mak @@ -169,6 +169,7 @@ LEXOBJS=\ $(DIR_O)\LexVB.obj \ $(DIR_O)\LexVerilog.obj \ $(DIR_O)\LexVHDL.obj \ + $(DIR_O)\LexVisualProlog.obj \ $(DIR_O)\LexYAML.obj \ #--Autogenerated -- end of automatically generated section @@ -453,6 +454,8 @@ $(DIR_O)\LexVerilog.obj: ..\lexers\LexVerilog.cxx $(LEX_HEADERS) $(DIR_O)\LexVHDL.obj: ..\lexers\LexVHDL.cxx $(LEX_HEADERS) +$(DIR_O)\LexVisualProlog.obj: ..\lexers\LexVisualProlog.cxx $(LEX_HEADERS) + $(DIR_O)\LexYAML.obj: ..\lexers\LexYAML.cxx $(LEX_HEADERS) |